1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly, to a semiconductor device including a super junction region.
2. Description of the Related Art
Vertical power metal oxide semiconductor field effect transistors (MOSFET) each have an ON-resistance that largely depends on the electrical resistance of the conductive layer (drift layer). The drift layer's electrical resistance depends on the impurity concentration thereof. A higher impurity concentration causes a lower ON-resistance. The higher impurity concentration, however, provides a lower breakdown voltage of the pn junction between the drift layer and the base layer. The impurity concentration thus cannot be higher than a limit level based on a breakdown voltage. There is a trade-off between the device breakdown voltage and the ON-resistance. It is important to improve the trade-off to provide a low power consumption semiconductor device. The trade-off has a limit level based on the device material. Providing a trade-off beyond the limit level is the way to achieve the low ON-resistance semiconductor device.
A known example of the MOSFET to solve the problems has a super junction region in the drift layer. The super junction region has vertical strip p and n type pillar regions. The two type pillar regions are alternately embedded in a lateral direction. The super junction region has the same charge amount (impurity amount) in the p and n type pillar regions to form a pseudo non-doped layer. The non-doped layer may hold the high breakdown voltage. The super junction region also has a highly doped n type pillar region through which a current passes through. The low ON-resistance beyond the material limit is thus provided.
In the semiconductor device having the super junction region, in order for the device region to hold the high breakdown voltage, the impurity amount should be accurately controlled in the n and p type pillar regions. Like the device region, the terminal region in the semiconductor device may be provided with a high concentration n type pillar region and also a high concentration p type pillar region to provide the high breakdown voltage. In the terminal region, the depletion layer may be extended both in the longitudinal direction of the alternately embedded pillar regions and in the direction perpendicular thereto. The electric field concentration may thus be reduced at the end portion of the p type base layer extending to the terminal region. The high breakdown voltage may thus be provided. In order to extend the depletion layer in the direction perpendicular to the longitudinal direction of the alternately embedded pillar regions, a known configuration includes a RESURF region and a field plate electrode in the surface of the terminal region (see, for example, JP 2003-273355).
Variation of the impurity amount of the p and n type pillar regions in the super junction region in the semiconductor device will decrease the breakdown voltage of the device region and the terminal region. Variation of the impurity amount of the p and n type pillar regions in the super junction region in the terminal region will change the electric field distribution in the terminal region. The electric field distribution change in the terminal region may generate a local electric field concentration. The electric field concentration may contribute to the reliability reduction, including the leak current variation, and the device breakdown due to the breakdown voltage reduction in the terminal region.